英语翻译16.2.Timer2Timer2isa16-bittimerformedbytwo8-bitSFRs:TMR2L(lowbyte)andTMR2H(highbyte).Timer2mayoperatein16-bitauto-reloadmodeor(split)8-bitauto-reloadmode.TheT2SPLITbit(TMR2CN.3)definestheTimer2operation

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英语翻译
16.2.Timer 2
Timer 2 is a 16-bit timer formed by two 8-bit SFRs:TMR2L (low byte) and TMR2H (high byte).Timer 2 may
operate in 16-bit auto-reload mode or (split) 8-bit auto-reload mode.The T2SPLIT bit (TMR2CN.3) defines
the Timer 2 operation mode.
Timer 2 may be clocked by the system clock,the system clock divided by 12,or the external oscillator
source divided by 8.The external clock mode is ideal for real-time clock (RTC) functionality,where the
internal oscillator drives the system clock while Timer 2 (and/or the PCA) is clocked by an external precision
oscillator.Note that the external oscillator source divided by 8 is synchronized with the system clock.
16.2.1.16-bit Timer with Auto-Reload
When T2SPLIT (TMR2CN.3) is zero,Timer 2 operates as a 16-bit timer with auto-reload.Timer 2 can be
clocked by SYSCLK,SYSCLK divided by 12,or the external oscillator clock source divided by 8.As the
16-bit timer register increments and overflows from 0xFFFF to 0x0000,the 16-bit value in the Timer 2
reload registers (TMR2RLH and TMR2RLL) is loaded into the Timer 2 register as shown in Figure 16.4,
and the Timer 2 High Byte Overflow Flag (TMR2CN.7) is set.If Timer 2 interrupts are enabled (if IE.5 is
set),an interrupt will be generated on each Timer 2 overflow.Additionally,if Timer 2 interrupts are enabled
and the TF2LEN bit is set (TMR2CN.5),an interrupt will be generated each time the lower 8 bits (TMR2L)
overflow from 0xFF to 0x00.
16.2.2.8-bit Timers with Auto-Reload
When T2SPLIT is set,Timer 2 operates as two 8-bit timers (TMR2H and TMR2L).Both 8-bit timers operate
in auto-reload mode as shown in Figure 16.5.TMR2RLL holds the reload value for TMR2L; TMR2RLH
holds the reload value for TMR2H.The TR2 bit in TMR2CN handles the run control for TMR2H.TMR2L is
always running when configured for 8-bit Mode.
Each 8-bit timer may be configured to use SYSCLK,SYSCLK divided by 12,or the external oscillator clock
source divided by 8.The Timer 2 Clock Select bits (T2MH and T2ML in CKCON) select either SYSCLK or
the clock defined by the Timer 2 External Clock Select bit (T2XCLK in TMR2CN),as follows:
Note:External clock divided by 8 is synchronized with the system clock,and the external clock must be
less than or equal to the system clock to operate in this mode.
The TF2H bit is set when TMR2H overflows from 0xFF to 0x00; the TF2L bit is set when TMR2L overflows
from 0xFF to 0x00.When Timer 2 interrupts are enabled (IE.5),an interrupt is generated each time
TMR2H overflows.If Timer 2 interrupts are enabled and TF2LEN (TMR2CN.5) is set,an interrupt is generated
each time either TMR2L or TMR2H overflows.When TF2LEN is enabled,software must check the
TF2H and TF2L flags to determine the source of the Timer 2 interrupt.The TF2H and TF2L interrupt flags
are not cleared by hardware and must be manually cleared by software.

Answer 1

好像是单片机,太多了啦